DRAM Chip SDRAM 256M-Bit 16Mx16 3.3V 54-Pin TSOP-II

DRAM Chip DDR3 SDRAM 1G-Bit 64Mx16 1.5V 96-Pin F-BGA

DRAM Chip DDR3 SDRAM 1G-Bit 64M x 16 1.5V 96-Pin F-BGA

DRAM Chip DDR3 SDRAM 4G-Bit 512Mx8 1.5V 78-Pin F-BGA

DRAM Chip DDR3L SDRAM 2G-Bit 128M x 16 1.35V 96-Pin F-BGA

The EM636165 SDRAM is a high-speed CMOS synchronous DRAM containing 16 Mbits. It is internally configured as a dual 512K word x 16 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Each of the 512K x 16 bit banks is organized as 2048 rows by 256 columns by 16 bits. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of a BankActivate command which is then followed by a Read or Write command. The EM636165 provides for programmable Read or Write burst lengths of 1, 2, 4, 8, or full page, with a burst termination option. An auto precharge function may be enabled to provide a self-timed row precharge that is initiated at the end of the burst sequence. The refresh functions, either Auto or Self Refresh are easy to use. By having a programmable mode register, the system can choose the most suitable modes to maximize its performance. These devices are well suited for applications requiring high memory bandwidth and particularly well suited to high performance PC applications .

DRAM Chip DDR2 SDRAM 1G-Bit 64M x 16 1.8V 84-Pin FBGA