Create a 1-Wire Master with Xilinx PicoBlaze
Introduction
This reference design (RD) describes a 1-Wire® Master with PicoBlaze™ 8-bit embedded microcontroller design implemented and tested on the Xilinx® Spartan®-6 LX9 MicroBoard by Avnet. This example design uses the DS28EA001-Wire digital thermometer with sequence detect and PIO on a peripheral module. This module uses the Pmod™ port standard developed by Digilent Inc.
System Design Block Diagram
The system shown in Figure 1 shows the high-level implementation of the design. The system requires:
- PicoBlaze processor
- 2 BRAMs (each 1024 x 18-bit)
- RS-232 port (USB UART)
- LEDs for alarms
- 681Ω ±1% pullup resistor
- Maxim Integrated DS28EA00 peripheral module (DS28EA00PMB1#)
- Xilinx platform cable USB
Figure 1. System design block diagram.
详情介绍
Introduction
This reference design (RD) describes a 1-Wire® Master with PicoBlaze™ 8-bit embedded microcontroller design implemented and tested on the Xilinx® Spartan®-6 LX9 MicroBoard by Avnet. This example design uses the DS28EA001-Wire digital thermometer with sequence detect and PIO on a peripheral module. This module uses the Pmod™ port standard developed by Digilent Inc.
System Design Block Diagram
The system shown in Figure 1 shows the high-level implementation of the design. The system requires:
- PicoBlaze processor
- 2 BRAMs (each 1024 x 18-bit)
- RS-232 port (USB UART)
- LEDs for alarms
- 681Ω ±1% pullup resistor
- Maxim Integrated DS28EA00 peripheral module (DS28EA00PMB1#)
- Xilinx platform cable USB
Figure 1. System design block diagram.
Reference Design Requirements
Software
The RD's software requirements are:
- Windows XP® or Windows® 7 OS
- A terminal program such as Tera Term or HyperTerminal®
- Xilinx ISE® Design Suite 14.2, Logic Edition or WebPack
- The PicoBlaze for Spartan-6 FPGAs software compiler
- S6LX9 PicoBlaze 1-Wire project files
Hardware
The RD's hardware setup is:
- PC with 500MB RAM and 500MB virtual memory (recommended)
- Spartan-6 LX9 MicroBoard, designed by Avnet
- DS28EA00 peripheral module (DS28EA00PMB1#)
- USB-A to USB-micro B cable
- Xilinx platform cable USB
File Structure
The directory structure and critical files for this RD are shown in Table 1.
Table 1. Reference Design Directory Structure
Directory | Supplied File | Description |
---|---|---|
S6LX9_PicoBlaze_1Wire_ise_14_2\ | All | Contains files for the whole project |
source\ise\ | OneWire.xise | ISE project file |
source\hdl\ | OneWire.vhd | Top-level VHDL source |
kcpsm6.vhd | PicoBlaze microcontroller source | |
source\hdl\KCPSM3_UART\ | UART_Manual.pdf | PicoBlaze UART manual |
UART_real_time_clock.pdf | PicoBlaze UART real-time clock manual | |
source\hdl\KCPSM3_UART\VHDL\ | bbfifo_16x8.vhd | PicoBlaze UART FIFO macro |
kcuart_rx.vhd | PicoBlaze UART receive macro | |
kcuart_tx.vhd | PicoBlaze UART transmit macro | |
uart_rx.vhd PicoBlaze | UART receive wrapper | |
uart_tx.vhd | PicoBlaze UART transmit wrapper | |
source\psm | kcpsm6.exe | Windows executable to compile the PicoBlaze application |
OWP.psm | ||
OWP.log | PicoBlaze 1-Wire log of the compiler output | |
OWP.vhd | Compiled PicoBlaze application formatted to initialize the Spartan-6 Block RAM | |
ROM.form.vhd | BRAM instantiation template used by the PicoBlaze assembler | |
KCPSM6_User_Guide_31March11.pdf | PicoBlaze user's guide | |
source\ucf | OneWire.ucf | User Constraints File that defines timing and pin location constraints for the project |
ready_for_download | onewire.bit | Project bitstream |
hardware | DS28EA00PMB1_sch.pdf | DS28EA00 peripheral module schematic and board layout |
DS28EA00PMB1_BOM.xls | Bill of materials for the DS28EA00 peripheral module | |
DS28EA00PMB1_gerber.zip | Gerber to manufacture the DS28EA00 peripheral module |
Installing the UART Driver and Virtual COM Port
If the S6LX9 MicroBoard has not been connected to the PC before, you must install the software driver for the virtual COM port (VCP):
- Follow the instructions in the "Silicon Labs CP210x USB-to-UART Setup Guide" to complete the installation of the USB driver for the S6LX9 MicroBoard. Click here for the driver location.
- Connect the USB-A to USB micro-B cable to the host PC and connector J3 on the S6LX9 MicroBoard.
- Windows 7 will automatically assign a VCP to the board. The Device Manager shows which COM port is assigned. It also allows the user to select a COM port. For example in this system, the default virtual COM port is COM17. Look in the Ports (COM & LPT) listing for the Silicon Labs CP210x USB to UART Bridge item. Note the COM port assigned by the system.
Set Up the S6LX9 MicroBoard
Use the following procedure to set up the application:
- Connect the USB-JTAG cable with a pod and ribbon connector between the JTAG connector on the board and a USB port on the PC. P
- lug the USB cable into the PC and port J3 on the S6LX9 board. LED D7 will illuminate.
- Plug in the DS28EA00 peripheral module with the component side facing the Spartan-6 into J5, the row where pin 1 is marked by the white dot.
Figure 2. The S6LX9 MicroBoard.
The 1-Wire Demo
Using the prebuilt bitstream file called "onewire.bit", the demo can be loaded into the FPGA and run without building the design. The Xilinx tools must be installed on your host PC, and the hardware should be set up as explained by the instructions in the "Set Up the S6LX9 MicroBoard" and "Installing the UART Driver and Virtual COM Port" sections. Here is the quick procedure to follow:
- Follow the install directions described in the "Installing the UART Driver and Virtual COM Port" section.
- Set up the S6LX9 MicroBoard as described in "Set Up the S6LX9 MicroBoard" section.
- Start a Tera Term or HyperTerminal session. Set the serial port parameters to your VCP, 9600 baud rate, no parity,8 bits, 1 stop bit, and no flow control.
- Using your Xilinx platform cable and the Xilinx software loading tool called iMPACT, load the "onewire.bit" file into the Spartan-6.
- If the DS28EA00 peripheral module is plugged in correctly, you will see:
- You can run the demo by typing "1" at the command prompt. This will display the temperature in 2's complement hex, followed continuously by the temperature in decimal. Also, the two LEDs on the DS28EA00 peripheral module will illuminate to represent the high and low alarms, similar to a thermostat controlling heating and cooling. The high alarm A default threshold is set to turn on at ≥ 29°C and the low alarm B default threshold is set to turn on at < 27°C. To exit at any time, press the Esc key.
- You can change the DS28EA00 peripheral module alarm LEDs by inputting a 2's complement threshold. As an example, if you input 1Ch (28d) into the high alarm threshold, LED A will turn on at ≥ 28°C. If you input 1Ah (26d) into the low alarm threshold, LED B will turn on at < 26°C. These new alarms are activated by typing "1" at the command prompt.
Note: If the "romid" shows all zeroes, recheck your connections. The DS28EA00 peripheral module likely does not have correct orientation or is plugged into the wrong row.
Compiling the Design
This design is contained within the PicoBlaze application code and can be updated to work with any 1-Wire slave device. There are key 1-Wire subroutines that should be understood by the designer. The low level 1-Wire subroutines are listed in Table 2. The design is contained within OWP.psm and if desired can be modified for your application.
Table 2. Key 1-Wire Subroutines
Speed | Subroutine | Description |
---|---|---|
Standard | ow_reset_slow | Resets the 1-Wire slave devices and prepares them for a command. |
Standard | write_byte_slow | Sends 8 bits of communication to the 1-Wire slave devices. |
Standard | write_byte_slow_power | Sends 8 bits of communication to the 1-Wire slave devices and then supplies strong pullup. The strong pullup will be cleared when the next 1-Wire subroutine is issued. |
Standard | read_byte_slow | Receives 8 bits of communication from the 1-Wire slave devices. |
Standard | read_byte_slow_power | Receives 8 bits of communication from 1-Wire slave devices and then supplies strong pullup. The strong pullup will be cleared when the next 1-Wire subroutine is issued. |
Overdrive | ow_reset_fast | Resets the 1-Wire bus slave devices and prepares them for a command. |
Overdrive | write_byte_fast | Sends 8 bits of communication to the 1-Wire slave devices. |
Overdrive | write_byte_fast_power | Sends 8 bits of communication to the 1-Wire slave devices and then supplies strong pullup. The strong pullup will be cleared when the next 1-Wire subroutine is issued. |
Overdrive | read_byte_fast | Receives 8 bits of communication from the 1-Wire slave devices. |
Overdrive | read_byte_fast_power | Receives 8 bits of communication from the 1-Wire slave devices and then supplies strong pullup. The strong pullup will be cleared when the next 1-Wire subroutine is issued. |
Recompiling Procedure
- The PicoBlaze assembler will produce the needed files for implementing your design. The new files will overwrite older files, so back up your original files before recompiling. Open Windows Explorer by navigating to "source\psm" and double-clicking on the program file called "kcpsm6.exe." You might receive a security warning stating "The publisher could not be verified. Are you sure you want to run this software?" Click run and you will get the following KCPSM6 assembler window:
- Type the OWP.psm file name and hit the return key to compile.
- The PicoBlaze assembler will begin running. If there are not any errors in the PicoBlaze code, you will see a screen like the one below. If there are errors, you will be alerted with the line number to where the problem is in the code file (i.e., in the OWP.psm file) and prompted to fix the error before rerunning the assembler.
- Start the Xilinx ISE Project Navigator and open the file in "ise\OneWire\OneWire.xise" as shown below.
- Select the top level file in the design hierarchy (i.e., OneWire – PicoBlaze) in the Hierarchy pane and double-click on Generate Programming File.
- Confirm the hardware set of connections as defined in the "Set Up the S6LX9 MicroBoard" section. Start a Tera Term or HyperTerminal session with the serial port parameters set to your virtual COM port, 9600 baud rate, noparity, 8 bits, 1 stop bit, and no flow control.
- In the ISE graphical user interface (GUI), select Configure Target Device to download the FPGA design to the S6LX9 MicroBoard. The PicoBlaze application will immediately begin running upon the download completion.
Summary
This RD illustrates how to use the Xilinx PicoBlaze to interface with a DS28EA00 peripheral module. The RD also can be used as a starting point to interface to other 1-Wire slave devices.
1-Wire is a registered trademark of Maxim Integrated Products, Inc.
HyperTerminal is a registered trademark of Hilgraeve, Incorporated.
ISE is a registered trademark of Xilinx, Inc.
PicoBlaze is a trademark of Xilinx, Inc.
Pmod is a trademark of Digilent Inc.
Spartan is a registered trademark of Xilinx, Inc.
Windows is a registered trademark and registered service mark of Microsoft Corporation.
Windows XP is a registered trademark and registered service mark of Microsoft Corporation.
Xilinx is a registered trademark and registered service mark of Xilinx, Inc.