高电流低噪声并行 LDO 参考设计
This parallel low-dropout (LDO) reference design showcases the TPS7A85 low-noise LDO linear regulator in a parallel configuration, which is capable of sourcing 3.5 A per LDO or 7 A per board. Additional design flexibility includes the ability to stack this design to meet the current requirements of an application.
详情介绍
Output current: up to 7 A per board (two TPS7A85 LDOs per board) Low-dropout (LDO) voltage: 200 mV (typ) Low-noise output: 3.33 μVRMS (10 Hz to 100 kHz for one LDO) when paralleling eight LDOs High output accuracy: 1% (over line, load, and temperature)