应用与设计

Packet Header Search Solution (200-400G)

详情介绍

Overview

Packet Header Search Solution

Faced with the challenges of increasing numbers of IoT terminals and the migration to cloud computing, service providers are focused on widespread adoption of 400 Gbps class equipment. At the same time, the diversification of endpoint applications to accommodate varying network traffic loads on an on-demand basis requires an efficient network environment that is scalable and flexible.
Renesas’ NSE reference design provides a flexible platform that adapts to a wide range of network topologies. With proven design interfacing to industry standard host devices, this solution make it possible to include a search offload engine into any network system with minimal development time.

System Block Diagram

Recommended Products

Block Semiconductor device Recommended products Features, etc.
Network memory NSE R8A20646BG-G / R8A20686BG-G 40Mb / 80Mb
Network memory NSE R8A20611BG-G / R8A20610BG-G 40Mb / 80Mb

Related Documents

Document Title Document No.
Control IP White Paper R10AN0013EU0100

Evaluation System

Improve time-to-market by utilizing proven evaluation system for product development

Packet Header Search Solution

Evaluation system include:

  • Reference board with onboard S-NSE-D
  • Sample design with Search Engine Control IP
  • Verification and evaluation applications

Item list for evaluation system

Item list for NSE device

Items Content
Documents Datasheet, Configuration guide, Power/Thermal guide
Design tool Verilog model, IBIS model, BSDL file

Item list for NSE evaluation system

Items Content
RDK board RDK board (FPGA board plug-in)
Control IP NSE Control IP (FPGA IP Format)
Software(API) Search Control API, NSE Device Configuration API
Documents Board hardware guide, Software manual, Control IP user guide
Sample design Reference design data, GUI tool, GUI manual

To inquire about Renesas Evaluation system, please contact us here.