R-Car T2
详情介绍
Overview
The R-Car T2 is a system on chip (SoC) for in-vehicle camera networks that conforms to all four standards (IEEE802.1AS / IEEE802.1Qav / IEEE802.1Qat / IEEE1722) that make up the Ethernet AVB standard, and is capable of transmitting images at extremely low latency. This enables camera images to be shared with multiple systems while maintaining real-time performance, which can be used for various driver assistance systems such as surround view monitoring and obstruction detection.
- Lower power consumption and more compact size help reduce the size of the camera housing (countermeasure against heat) in order to minimize negative effects on automobile design
- Next-generation Ethernet helps reduce amount of cables to reduce vehicle weight and space requirements
- H.264 encoder realizes high-quality, low-latency image transmission that helps improve visibility
- Low-latency performance is realized by optimization of proprietary system
Block Diagram of Module
- Ethernet AVB 1.0-conformant
- Built-in independently developed H.264 encoder; < 1 ms low-latency transmission of high-quality, high-definition images
- Connects to 1.3 Megapixel image sensor SoC
- Ultralow power consumption: 40 mW (typ.); reduces device-generated heat issues
- 6-mm-square small package allows size of camera module to be reduced
- Guaranteed connectivity with other R-Car devices
Product specification
| Item | R-Car T2 Specifications |
|---|---|
| Part Number | R-Car T2 (R9A05G011) |
| Power Supply Voltage | 3.3 V / 1.8 V (IO), 1.2 V (core) |
| CPU Core | Arm ® Cortex ® -M3 processor |
| Built-in Memory | 512 KB |
| External Memory Interface |
Serial flash ROM interface |
| CMOS Sensor Interface |
Input data format: YUV422, 8/10-bit |
| Input image size: 1280 x 960 pixels (maximum) | |
| Input data bit width: 16-bit (Y: 8-bit / UV: 8-bit), 10-bit multiplex, 8-bit multiplex | |
| H.264 Encoder | Input image size: 1280 x 960 pixels (maximum) |
| Input frame rate: 30 fps | |
| Output format: YUV420 | |
| Encoding processing time: 1 ms or less | |
| Ethernet Interface | Ethernet AVB 1.0-compatible MAC built in |
| Interface: MII | |
Ethernet AVB (802.1BA)
|
|
| Other Peripherals | 32-bit compare timer x 4 channels |
| Watchdog timer x 1 channel | |
| I 2 C bus interface x 1 channel | |
| Clock synchronous serial interface (CSI) x 1 channel | |
| Quad serial peripheral interface (QSPI) x 1 channel (supports flash ROM interface) | |
| Interrupt controller (INTC) | |
| Clock: Crystal resonator (25 MHz) or external clock input | |
| Debugging functions (JTAG) | |
| Power Consumption | 40 mW (Typ.) |
| Package | 121-pin FPBGA (6 mm x 6 mm) |
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*Other names of products or services mentioned in this press release are trademarks or registered trademarks of their respective owners.