| Program Memory Type | ROMLess |
| PCB changed | 40 |
| ECCN (US) | EAR99 |
| Data Bus Width (bit) | 8 |
| Device Core | Z80 |
| SPI | 0 |
| Minimum Operating Temperature (°C) | -40 |
| Maximum Operating Temperature (°C) | 100 |
| Supplier Package | PDIP |
| Instruction Set Architecture | CISC |
| Core Architecture | Z80 |
| Package Height | 4.06(Max) |
| Family Name | Z80 |
| Maximum Operating Supply Voltage (V) | 5.5 |
| Maximum Clock Rate (MHz) | 6.17 |
| EU RoHS | Compliant |
| I2C | 0 |
| Maximum CPU Frequency (MHz) | 6.17 |
| USB | 0 |
| UART | 0 |
| I2S | 0 |
| Supplier Temperature Grade | Extended |
| Package Length | 52.58(Max) |
| CECC Qualified | No |
| Standard Package Name | DIP |
| Pin Count | 40 |
| Mounting | Through Hole |
| USART | 0 |
| CAN | 0 |
| Lead Shape | Through Hole |
| Ethernet | 0 |
| Part Status | Active |
| Number of I/Os | 16 |
| Typical Operating Supply Voltage (V) | 5 |
| Package Width | 14.22(Max) |
| Programmability | No |
| Minimum Operating Supply Voltage (V) | 4.5 |
