| Maximum Propagation Delay Time @ Maximum CL (ns) | 180@2V|31@6V|36@4.5V |
| PCB changed | 16 |
| HTS | 8542.39.00.01 |
| Number of Elements per Chip | 1 |
| ECCN (US) | EAR99 |
| Minimum Operating Temperature (°C) | -40 |
| Maximum Operating Temperature (°C) | 85 |
| Supplier Package | PDIP |
| Maximum High Level Output Current (mA) | -5.2 |
| Process Technology | CMOS |
| Absolute Propagation Delay Time (ns) | 225 |
| Propagation Delay Test Condition (pF) | 50 |
| Logic Function | Decoder/Demultiplexer |
| Package Height | 5.08(Max) - 0.51(Min) |
| Number of Element Outputs | 8 |
| Polarity | Inverting |
| Maximum Operating Supply Voltage (V) | 6 |
| EU RoHS | Compliant |
| Demultiplexing Capability | 1-of-8 |
| Number of Element Inputs | 3 |
| Package Length | 19.69(Max) |
| Standard Package Name | DIP |
| Maximum Low Level Output Current (mA) | 5.2 |
| Pin Count | 16 |
| Mounting | Through Hole |
| Number of Output Enables per Element | 0 |
| Number of Input Enables per Element | 3 |
| Lead Shape | Through Hole |
| Part Status | Active |
| Packaging | Tube |
| Typical Operating Supply Voltage (V) | 5 |
| Logic Family | HC |
| Package Width | 6.6(Max) |
| Maximum Quiescent Current (mA) | 0.008 |
| Minimum Operating Supply Voltage (V) | 2 |
