| Number of Channels per Chip | 6 |
| Number of Output Enables per Chip | 0 |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 20@6V|23@4.5V|115@2V |
| PCB changed | 14 |
| Output Type | Open Drain |
| Maximum Quiescent Current (uA) | 2 |
| Number of Elements per Chip | 6 |
| ECCN (US) | EAR99 |
| Minimum Operating Temperature (°C) | -40 |
| Maximum Operating Temperature (°C) | 125 |
| Supplier Package | PDIP |
| Maximum High Level Output Current (mA) | -0.005 |
| Process Technology | CMOS |
| Absolute Propagation Delay Time (ns) | 145 |
| Propagation Delay Test Condition (pF) | 50 |
| Logic Function | Buffer/Driver |
| Package Height | 5.08(Max) - 0.51(Min) |
| Polarity | Inverting |
| Maximum Operating Supply Voltage (V) | 6 |
| EU RoHS | Compliant |
| Number of Inputs per Chip | 6 |
| Number of Outputs per Chip | 6 |
| Package Length | 19.69(Max) |
| Standard Package Name | DIP |
| Maximum Low Level Output Current (mA) | 5.2 |
| Pin Count | 14 |
| Mounting | Through Hole |
| Number of Input Enables per Chip | 0 |
| Input Signal Type | Single-Ended |
| Bus Hold | No |
| Lead Shape | Through Hole |
| Part Status | Active |
| Packaging | Tube |
| Typical Operating Supply Voltage (V) | 5 |
| Logic Family | HC |
| Package Width | 6.6(Max) |
| Minimum Operating Supply Voltage (V) | 2 |
