| Configuration | 1 x 1:1 |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 4.4@3.3V |
| PCB changed | 14 |
| HTS | 8542.39.00.01 |
| Maximum Quiescent Current (uA) | 10 |
| Number of Elements per Chip | 4 |
| ECCN (US) | EAR99 |
| Minimum Operating Temperature (°C) | -40 |
| Maximum Operating Temperature (°C) | 85 |
| Supplier Package | VQFN EP |
| Maximum High Level Output Current (mA) | -128 |
| Process Technology | CMOS |
| Absolute Propagation Delay Time (ns) | 4.6 |
| Propagation Delay Test Condition (pF) | 50 |
| Logic Function | Bus Switch |
| Package Height | 0.95(Max) |
| Maximum Operating Supply Voltage (V) | 3.6 |
| EU RoHS | Compliant |
| Maximum On Resistance (Ohm) | 27(Typ) |
| Number of Inputs per Chip | 4 |
| Number of Outputs per Chip | 4 |
| Package Length | 3.65(Max) |
| Standard Package Name | QFN |
| Maximum Low Level Output Current (mA) | 128 |
| Pin Count | 14 |
| Mounting | Surface Mount |
| Lead Shape | No Lead |
| Part Status | Active |
| Packaging | Tape and Reel |
| Typical Operating Supply Voltage (V) | 3.3 |
| Logic Family | CBTLV |
| Package Width | 3.65(Max) |
| Minimum Operating Supply Voltage (V) | 2.3 |
