Number of Channels per Chip | 18 |
Input Level | LVTTL|TTL |
Maximum Propagation Delay Time @ Maximum CL (ns) | 5.6@2.7V|4.9@3.3V |
PCB changed | 56 |
HTS | 8542.39.00.01 |
Output Type | 3-State |
Maximum Quiescent Current (uA) | 40 |
Number of Elements per Chip | 1 |
ECCN (US) | EAR99 |
Minimum Operating Temperature (°C) | -40 |
Maximum Operating Temperature (°C) | 85 |
Supplier Package | TSSOP |
Maximum High Level Output Current (mA) | -24 |
Process Technology | CMOS |
Absolute Propagation Delay Time (ns) | 6.3 |
Propagation Delay Test Condition (pF) | 50 |
Logic Function | Universal Bus Transceiver |
Data Flow Direction | Bi-Directional |
Triggering Type | Positive-Edge |
Package Height | 1.05(Max) |
Polarity | Non-Inverting |
Maximum Operating Supply Voltage (V) | 3.6 |
EU RoHS | Compliant |
Number of Selection Inputs per Element | 0 |
Output Level | LVCMOS |
Supplier Temperature Grade | Commercial |
Package Length | 14.1(Max) |
Standard Package Name | SOP |
Maximum Low Level Output Current (mA) | 24 |
Pin Count | 56 |
Mounting | Surface Mount |
Number of Output Enables per Element | 1 Low/1 High |
Number of Input Enables per Element | 2 High |
Bus Hold | Yes |
Lead Shape | Gull-wing |
Part Status | Active |
Packaging | Tape and Reel |
Logic Family | ALVC |
Package Width | 6.2(Max) |
Number of Direction Control Inputs | 0 |
Minimum Operating Supply Voltage (V) | 1.65 |