| Maximum Propagation Delay Time @ Maximum CL (ns) | 420@10V|1040@5V|300@15V |
| PCB changed | 16 |
| Number of Elements per Chip | 1 |
| ECCN (US) | EAR99 |
| Minimum Operating Temperature (°C) | -55 |
| Maximum Operating Temperature (°C) | 125 |
| Supplier Package | PDIP |
| Process Technology | CMOS |
| Absolute Propagation Delay Time (ns) | 1320 |
| Propagation Delay Test Condition (pF) | 50 |
| Logic Function | Latch/Decoder/Driver |
| Package Height | 5.08(Max) - 0.51(Min) |
| Number of Element Outputs | 7 |
| Polarity | Non-Inverting |
| Maximum Operating Supply Voltage (V) | 18 |
| EU RoHS | Compliant |
| Number of Element Inputs | 4 |
| Supplier Temperature Grade | Military |
| Package Length | 19.69(Max) |
| Standard Package Name | DIP |
| Maximum Low Level Output Current (mA) | 4.2(Min) |
| Pin Count | 16 |
| Mounting | Through Hole |
| Number of Output Enables per Element | 0 |
| Number of Input Enables per Element | 1 |
| Lead Shape | Through Hole |
| Part Status | Active |
| Packaging | Tube |
| Typical Operating Supply Voltage (V) | 12|15|5|3.3|9 |
| Logic Family | CD4000 |
| Package Width | 6.6(Max) |
| Maximum Quiescent Current (mA) | 0.1 |
| Minimum Operating Supply Voltage (V) | 3 |
