Maximum Propagation Delay Time @ Maximum CL (ns) | 1250@5V|350@15V|500@10V |
PCB changed | 16 |
HTS | 8542.39.00.01 |
ECCN (US) | EAR99 |
Minimum Operating Temperature (°C) | -55 |
Maximum Operating Temperature (°C) | 125 |
Supplier Package | PDIP |
Maximum High Level Output Current (mA) | -4.2(Min) |
Process Technology | CMOS |
Absolute Propagation Delay Time (ns) | 1250 |
Propagation Delay Test Condition (pF) | 50 |
Package Height | 5.08(Max) - 0.51(Min) |
Polarity | Non-Inverting |
Maximum Operating Supply Voltage (V) | 18 |
Number of Bits | 4 |
EU RoHS | Compliant |
Package Length | 19.69(Max) |
Standard Package Name | DIP |
Maximum Low Level Output Current (mA) | 4.2(Min) |
Pin Count | 16 |
Mounting | Through Hole |
Type | Magnitude Comparator |
Lead Shape | Through Hole |
Part Status | Active |
Packaging | Tube |
Output Function | A<B, A=B, A>B |
Typical Operating Supply Voltage (V) | 12|15|5|3.3|9 |
Logic Family | CD4000 |
Package Width | 6.6(Max) |
Maximum Quiescent Current (mA) | 0.1 |
Minimum Operating Supply Voltage (V) | 3 |