Number of Channels per Chip | 2 |
Maximum Propagation Delay Time @ Maximum CL (ns) | 300@5V|130@10V|90@15V |
PCB changed | 16 |
Number of Elements per Chip | 2 |
ECCN (US) | EAR99 |
Minimum Operating Temperature (°C) | -55 |
Maximum Operating Temperature (°C) | 125 |
Supplier Package | SOIC |
Maximum High Level Output Current (mA) | -4.2(Min) |
Process Technology | CMOS |
Absolute Propagation Delay Time (ns) | 400 |
Propagation Delay Test Condition (pF) | 50 |
Logic Function | JK-Master-Slave Type |
Triggering Type | Positive-Edge |
Package Height | 1.5(Max) |
Number of Element Outputs | 1 |
Polarity | Inverting/Non-Inverting |
Maximum Operating Supply Voltage (V) | 18 |
EU RoHS | Compliant |
Set/Reset | Set/Reset |
Number of Element Inputs | 2 |
Supplier Temperature Grade | Military |
Package Length | 10(Max) |
Standard Package Name | SOP |
Maximum Low Level Output Current (mA) | 4.2(Min) |
Pin Count | 16 |
Mounting | Surface Mount |
Input Signal Type | Single-Ended |
Bus Hold | No |
Lead Shape | Gull-wing |
Part Status | Active |
Packaging | Tape and Reel |
Typical Operating Supply Voltage (V) | 12|15|5|3.3|9 |
Logic Family | CD4000 |
Package Width | 4(Max) |
Maximum Quiescent Current (mA) | 0.02 |
Minimum Operating Supply Voltage (V) | 3 |