| Maximum Propagation Delay Time @ Maximum CL (ns) | 41@4.5V|205@2V|35@6V |
| PCB changed | 16 |
| HTS | 8542.39.00.01 |
| Number of Elements per Chip | 1 |
| ECCN (US) | EAR99 |
| Parallel Enable Input | Yes |
| Number of Stages | 4 |
| Direction Type | Uni-Directional |
| Minimum Operating Temperature (°C) | -55 |
| Maximum Operating Temperature (°C) | 125 |
| Supplier Package | CDIP |
| Process Technology | CMOS |
| Absolute Propagation Delay Time (ns) | 325 |
| Propagation Delay Test Condition (pF) | 50 |
| Logic Function | Counter |
| Number of Count Input Enables | 2 |
| Triggering Type | Positive-Edge |
| Package Height | 3.56(Max) |
| Number of Element Outputs | 4 |
| Maximum Operating Supply Voltage (V) | 6 |
| EU RoHS | Not Compliant |
| Number of Selection Inputs per Element | 0 |
| Preset Type | Synchronous |
| Number of Element Inputs | 4 |
| Supplier Temperature Grade | Military |
| Package Length | 21.34(Max) |
| Terminal Count Output | Yes |
| Standard Package Name | DIP |
| Operation Mode | UP Counter |
| Pin Count | 16 |
| Mounting | Through Hole |
| Type | Binary |
| Reset Type | Synchronous |
| Lead Shape | Through Hole |
| Part Status | Active |
| Packaging | Tube |
| Typical Operating Supply Voltage (V) | 5 |
| Logic Family | HC |
| Package Width | 7.62(Max) |
| Minimum Operating Supply Voltage (V) | 2 |
