Maximum Propagation Delay Time @ Maximum CL (ns) | 130@2V|22@6V|26@4.5V |
PCB changed | 14 |
HTS | 8542.39.00.01 |
Output Type | Push-Pull |
Maximum Quiescent Current (uA) | 2 |
Number of Elements per Chip | 1 |
ECCN (US) | EAR99 |
Minimum Operating Temperature (°C) | -55 |
Maximum Operating Temperature (°C) | 125 |
Supplier Package | CDIP |
Maximum High Level Output Current (mA) | -5.2 |
Process Technology | CMOS |
Absolute Propagation Delay Time (ns) | 195 |
Propagation Delay Test Condition (pF) | 50 |
Logic Function | NAND |
Package Height | 3.56(Max) |
Number of Element Outputs | 1 |
Maximum Operating Supply Voltage (V) | 6 |
EU RoHS | Not Compliant |
Number of Selection Inputs per Element | 0 |
Number of Element Inputs | 8-IN |
Supplier Temperature Grade | Military |
Package Length | 19.94(Max) |
Standard Package Name | DIP |
Maximum Low Level Output Current (mA) | 5.2 |
Pin Count | 14 |
Mounting | Through Hole |
Number of Output Enables per Element | 0 |
Lead Shape | Through Hole |
Part Status | Active |
Packaging | Tube |
Typical Operating Supply Voltage (V) | 5|3.3|2.5 |
Logic Family | HC |
Package Width | 7.62(Max) |
Minimum Operating Supply Voltage (V) | 2 |