Maximum Propagation Delay Time @ Maximum CL (ns) | 600@5V|190@15V|250@10V |
PCB changed | 16 |
HTS | 8542.39.00.01 |
Output Type | 3-State |
Number of Elements per Chip | 1 |
ECCN (US) | EAR99 |
Parallel Enable Input | No |
Number of Stages | 8 |
Direction Type | Uni-Directional |
Minimum Operating Temperature (°C) | -55 |
Maximum Operating Temperature (°C) | 125 |
Supplier Package | CDIP |
Process Technology | CMOS |
Absolute Propagation Delay Time (ns) | 840 |
Propagation Delay Test Condition (pF) | 50 |
Logic Function | Shift Register/Latch |
Number of Count Input Enables | 0 |
Triggering Type | Positive-Edge |
Package Height | 3.56(Max) |
Number of Element Outputs | 10 |
Maximum Operating Supply Voltage (V) | 18 |
EU RoHS | Not Compliant |
Number of Selection Inputs per Element | 0 |
Number of Element Inputs | 1 |
Supplier Temperature Grade | Military |
Package Length | 21.34(Max) |
Terminal Count Output | No |
Standard Package Name | DIP |
Operation Mode | Serial to Serial/Parallel |
Pin Count | 16 |
Mounting | Through Hole |
Lead Shape | Through Hole |
Part Status | Active |
Packaging | Tube |
Typical Operating Supply Voltage (V) | 12|15|5|3.3|9 |
Logic Family | CD4000 |
Package Width | 7.62(Max) |
Maximum Quiescent Current (mA) | 0.1 |
Minimum Operating Supply Voltage (V) | 3 |