Number of Channels per Chip | 2 |
Maximum Propagation Delay Time @ Maximum CL (ns) | 150@10V|350@5V|100@15V |
PCB changed | 14 |
HTS | 8542.39.00.01 |
Number of Elements per Chip | 2 |
ECCN (US) | EAR99 |
Minimum Operating Temperature (°C) | -55 |
Maximum Operating Temperature (°C) | 125 |
Supplier Package | PDIP |
Maximum High Level Output Current (mA) | -4.2(Min) |
Process Technology | CMOS |
Absolute Propagation Delay Time (ns) | 450 |
Propagation Delay Test Condition (pF) | 50 |
Logic Function | D-Type |
Triggering Type | Positive-Edge |
Package Height | 4.95(Max) |
Number of Element Outputs | 1 |
Polarity | Inverting/Non-Inverting |
Maximum Operating Supply Voltage (V) | 18 |
EU RoHS | Not Compliant |
Set/Reset | Set/Reset |
Number of Element Inputs | 1 |
Package Length | 19.69(Max) |
Standard Package Name | DIP |
Maximum Low Level Output Current (mA) | 4.2(Min) |
Pin Count | 14 |
Mounting | Through Hole |
Input Signal Type | Single-Ended |
Bus Hold | No |
Lead Shape | Through Hole |
Part Status | Obsolete |
Packaging | Tube |
Typical Operating Supply Voltage (V) | 12|15|5|3.3|9 |
Logic Family | 4000 |
Package Width | 7.11(Max) |
Maximum Quiescent Current (mA) | 0.004 |
Minimum Operating Supply Voltage (V) | 3 |