| Number of Channels per Chip | 8 |
| Number of Output Enables per Chip | 2 Low |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 9@5V |
| PCB changed | 20 |
| HTS | 8542.39.00.01 |
| Output Type | 3-State |
| Maximum Quiescent Current (uA) | 4 |
| Number of Elements per Chip | 2 |
| ECCN (US) | EAR99 |
| Minimum Operating Temperature (°C) | -40 |
| Maximum Operating Temperature (°C) | 85 |
| Supplier Package | TSSOP |
| Maximum High Level Output Current (mA) | -24 |
| Process Technology | CMOS |
| Absolute Propagation Delay Time (ns) | 10.5 |
| Propagation Delay Test Condition (pF) | 50 |
| Logic Function | Buffer/Line Driver |
| Package Height | 0.9 |
| Polarity | Non-Inverting |
| Maximum Operating Supply Voltage (V) | 5.5 |
| Number of Inputs per Chip | 8 |
| Number of Outputs per Chip | 8 |
| Package Length | 6.5 |
| Standard Package Name | SOP |
| Maximum Low Level Output Current (mA) | 24 |
| Pin Count | 20 |
| Mounting | Surface Mount |
| Number of Input Enables per Chip | 0 |
| Input Signal Type | Single-Ended |
| 欧盟限制某些有害物质的使用 | Compliant |
| Bus Hold | No |
| Lead Shape | Gull-wing |
| Part Status | Active |
| Packaging | Tape and Reel |
| Typical Operating Supply Voltage (V) | 5 |
| Logic Family | ACT |
| Package Width | 4.4 |
| Minimum Operating Supply Voltage (V) | 4.5 |
