| Number of Channels per Chip | 8 |
| Number of Output Enables per Chip | 2 Low |
| Maximum Propagation Delay Time @ Maximum CL (ns) | 7.5@4.5V to 5.5V|11.9@3V to 3.6V |
| PCB changed | 20 |
| Output Type | 3-State |
| Maximum Quiescent Current (uA) | 4 |
| Number of Elements per Chip | 2 |
| ECCN (US) | EAR99 |
| Maximum Power Dissipation (mW) | 500 |
| Minimum Operating Temperature (°C) | -40 |
| Maximum Operating Temperature (°C) | 125 |
| Supplier Package | DHVQFN EP |
| Maximum High Level Output Current (mA) | -8 |
| Process Technology | CMOS |
| Absolute Propagation Delay Time (ns) | 15 |
| Propagation Delay Test Condition (pF) | 50 |
| Logic Function | Buffer/Line Driver |
| Package Height | 0.95(Max) |
| Polarity | Non-Inverting |
| Maximum Operating Supply Voltage (V) | 5.5 |
| EU RoHS | Compliant |
| Number of Inputs per Chip | 8 |
| Number of Outputs per Chip | 8 |
| Package Length | 4.5 |
| Maximum Low Level Output Current (mA) | 8 |
| Pin Count | 20 |
| Mounting | Surface Mount |
| Number of Input Enables per Chip | 0 |
| Input Signal Type | Single-Ended |
| Bus Hold | No |
| Part Status | Active |
| Packaging | Tape and Reel |
| Typical Operating Supply Voltage (V) | 5 |
| Logic Family | VHC |
| Package Width | 2.5 |
| Minimum Operating Supply Voltage (V) | 2 |
