| Program Memory Type | Flash |
| Maximum Expanded Memory Size | 4GB |
| Data Bus Width (bit) | 32 |
| SPI | 1 |
| Analog Comparators | 1 |
| Supplier Package | QFN EP |
| Instruction Set Architecture | RISC |
| Core Architecture | ARM |
| Family Name | KL05 |
| Maximum Operating Supply Voltage (V) | 3.6 |
| Maximum Clock Rate (MHz) | 48 |
| EU RoHS | Compliant |
| PWM | 2 |
| Standard Package Name | QFN |
| Pin Count | 24 |
| Parallel Master Port | No |
| Mounting | Surface Mount |
| USART | 0 |
| CAN | 0 |
| Lead Shape | No Lead |
| Ethernet | 0 |
| Packaging | Tray |
| Program Memory Size | 8KB |
| Typical Operating Supply Voltage (V) | 3.3|2.5|1.8 |
| Number of DACs | Single |
| Programmability | Yes |
| PCB changed | 24 |
| HTS | 8542.31.00.01 |
| ECCN (US) | 3A991.a.2 |
| Real Time Clock | Yes |
| Device Core | ARM Cortex M0+ |
| ADC Channels | 12 |
| Minimum Operating Temperature (°C) | -40 |
| Maximum Operating Temperature (°C) | 105 |
| No. of Timers | 10 |
| Package Height | 0.95(Max) |
| I2C | 1 |
| Interface Type | I2C/SPI/UART |
| Maximum CPU Frequency (MHz) | 48 |
| Number of ADCs | Single |
| USB | 0 |
| RAM Size | 1KB |
| UART | 1 |
| ADC Resolution (bit) | 12 |
| I2S | 0 |
| Package Length | 4 |
| CECC Qualified | No |
| Watchdog | 1 |
| Part Status | Active |
| Number of I/Os | 22 |
| Package Width | 4 |
| Minimum Operating Supply Voltage (V) | 1.71 |
