| Number of Channels per Chip | 16 |
| Fabrication Technology | CMOS |
| Output Signal Type | Single-Ended |
| Max Processing Temp | 260 |
| HTSN | 8542390001 |
| Output Type | 3-State |
| Number of Elements per Chip | 2 |
| SCHEDULE B | 8542390000 |
| Screening Level | Industrial |
| Logic Function | D-Type Bus Interface |
| Typical Operating Supply Voltage | 5 |
| Triggering Type | Positive-Edge |
| Number of Element Outputs | 8 |
| Polarity | Non-Inverting |
| Propagation Delay Test Condition | 50 pF |
| Operating Temperature | -40 to 85 °C |
| UNSPSC VERSION | V15.1101 |
| Maximum Low Level Output Current | 24 mA |
| Maximum High Level Output Current | -24 mA |
| Maximum Operating Supply Voltage | 5.5 V |
| ECCN | EAR99 |
| Number of Element Inputs | 8 |
| Lead Finish | Matte Tin |
| Mounting | Surface Mount |
| Maximum Quiescent Current | 0.005 mA |
| Number of Output Enables per Element | 1 |
| Minimum Operating Supply Voltage | 4.5 V |
| Input Signal Type | Single-Ended |
| Maximum Propagation Delay Time @ Maximum CL | 5.2@5V ns |
| Bus Hold | No |
| Pitch | 0.5 |
| UNSPSC | 32101634 |
