Typical Input Capacitance @ Vds (pF) | 622@400V |
Typical Output Capacitance @ Vds (pF) | 77@400V |
Configuration | Dual |
Typical Turn-Off Delay Time (ns) | 4 |
PCB changed | 6 |
Maximum Gate Source Leakage Current (nA) | 100 |
Number of Elements per Chip | 2 |
Typical Power Gain (dB) | 13 |
ECCN (US) | EAR99 |
Typical Rise Time (ns) | 3 |
Maximum Power Dissipation (mW) | 10000 |
Channel Mode | Enhancement |
Typical Turn-On Delay Time (ns) | 4 |
Automotive | No |
Minimum Operating Temperature (°C) | -55 |
Maximum Operating Temperature (°C) | 175 |
Maximum IDSS (uA) | 50 |
Typical Fall Time (ns) | 5 |
Process Technology | ZMOS |
Package Height | 3.3(Max) |
Channel Type | N |
Typical Forward Transconductance (S) | 3.8 |
EU RoHS | Compliant |
Maximum Continuous Drain Current (A) | 10 |
Military | No |
Maximum Drain Source Voltage (V) | 500 |
Maximum Gate Source Voltage (V) | ±20 |
Maximum Drain Source Resistance (mOhm) | 1000@20V |
Package Length | 15 |
Pin Count | 6 |
Mounting | Surface Mount |
Typical Drain Efficiency (%) | 65 |
Mode of Operation | Class AB |
Typical Reverse Transfer Capacitance @ Vds (pF) | 12@400V |
Part Status | Obsolete |
Maximum Gate Threshold Voltage (V) | 6.5 |
Package Width | 16.51 |
Maximum Frequency (MHz) | 175 |