| Number of Channels per Chip | 8 |
| Fabrication Technology | CMOS |
| Taxonomy | Standard and Specialty Logic » Standard Logic » Latch |
| Output Type | 3-State |
| Number of Elements per Chip | 1 |
| Package Width (mm) | 4.4 |
| Minimum Operating Temperature (°C) | -40 |
| Maximum Operating Temperature (°C) | 85 |
| Supplier Package | TSSOP |
| Maximum High Level Output Current (mA) | -8 |
| Latch Mode | Transparent |
| Absolute Propagation Delay Time (ns) | 17.5 |
| Polarity | Non-Inverting |
| Maximum Operating Supply Voltage (V) | 5.5 |
| Package Height (mm) | 0.9 |
| EU RoHS | Compliant |
| Number of Inputs per Chip | 8 |
| Number of Outputs per Chip | 8 |
| Standard Package Name | TSSOP |
| Maximum Low Level Output Current (mA) | 8 |
| PCB | 20 |
| Pin Count | 20 |
| Mounting | Surface Mount |
| Type | D-Type |
| Package Length (mm) | 6.5 |
| Lead Shape | Gull-wing |
| Packaging | Tape and Reel |
| Typical Operating Supply Voltage (V) | 2.5|3.3|5 |
| Logic Family | VHC |
| Minimum Operating Supply Voltage (V) | 2 |
