| Fabrication Technology | 65nm |
| Program Memory Type | SRAM |
| Provider Name | Barco Silex/Mobiveil, Inc |
| Taxonomy | Programmable Devices » Programmable Logic Devices » FPGA |
| Logic Elements | 47500 |
| Package Width (mm) | 23 |
| Operating Supply Voltage (V) | 1.1 |
| Minimum Operating Temperature (°C) | 0 |
| Maximum Operating Temperature (°C) | 85 |
| Supplier Package | FC-FBGA |
| Device Logic Units | 47500 |
| Single-Ended I/O Standards | LVTTL|LVCMOS |
| IP Core | Sub-frame Latency JPEG 2000 Encoder (BA130)|RapidIO to AXI Bridge Controller (RAB)|EtherCAT|EtherNE |
| Screening Level | Commercial |
| Family Name | Stratix® III L |
| Maximum Operating Supply Voltage (V) | 1.15 |
| Package Height (mm) | 2.55 |
| EU RoHS | Not Compliant |
| External Memory Interface | DDR2 SDRAM|DDR3 SDRAM|RLDRAM II|QDRII+SRAM |
| Main Family | Stratix |
| Differential I/O Standards | LVPECL|LVDS |
| Device Number of DLLs/PLLs | 4 |
| Number of Multipliers | 216 (18x18) |
| Embedded Memory | 2133 |
| Standard Package Name | BGA |
| PCB | 484 |
| Pin Count | 484 |
| Mounting | Surface Mount |
| Package Length (mm) | 23 |
| Lead Shape | Ball |
| Opr. Frequency (MHz) | 450 |
| User I/Os | 296 |
