首页/AT45DB321E-SHF-T搜索结果/AT45DB321E-SHF-T规格参数/
AT45DB321E-SHF-T
ADESTO

AT45DB321E-SHF-T

Single 2.3V - 3.6V supply Serial Peripheral Interface (SPI) compatible Supports SPI modes 0 and 3 Supports RapidS™ operation Continuous read capability through entire array Up to 85MHz Low-power read option up to 15MHz Clock-to-output time (tV) of 6ns maximum User configurable page size 512 bytes per page 528 bytes per page (default) Page size can be factory pre-configured for 512 bytes Two fully independent SRAM data buffers (512/528 bytes) Flexible programming options Byte/Page Program (1 to 512/528 bytes) directly into main memory Buffer Write Buffer to Main Memory Page Program Flexible erase options Page Erase (512/528 bytes) Block Erase (4KB) Sector Erase (64KB) Chip Erase (32-Mbits) Program and Erase Suspend/Resume Advanced hardware and software data protection features Individual sector protection Individual sector lockdown to make any sector permanently read-only 128-byte, One-Time Programmable (OTP) Security Register 64 bytes factory programmed with a unique identifier 64 bytes user programmable Hardware and software controlled reset options JEDEC Standard Manufacturer and Device ID Read Low-power dissipation 400nA Ultra-Deep Power-Down current (typical) 3µA Deep Power-Down current (typical) 25µA Standby current (typical) 11mA Active Read current (typical) Endurance: 100,000 program/erase cycles per page minimum Data retention: 20 years Green (Pb/Halide-free/RoHS compliant) packaging options 8-lead SOIC (0.208" wide) 8-pad Ultra-thin DFN (5 x 6 x 0.6mm) 9-ball Ultra-thin UBGA (6 x 6 x 0.6mm) Die in Wafer Form
中间价(CNY):13.736
推荐供应商
数据手册
规格参数
非常抱歉我们暂时未能收集到您需要的规格参数,请留下您的联系方式,我们将会在收集到相关资料后第一时间为您反馈,感谢您对我们平台的信赖和支持!